Chip Design Performance Testing

SCENARIO

Trends, such as cloud computing and network functions virtualization (NFV) are pushing the boundaries of network capacity. To support this demand, NEMs and chip manufacturers need to keep up by delivering ultra-high-density devices powered by state-of-the-art system-on-a-chip (SoC) solutions.


Producing an SoC, each capable of handling terabits of traffic across hundreds of ports at speeds of up to 100Gbps, is a lengthy process. But with increased time-to-market pressures, all major chip manufacturers are looking to accelerate their development cycles. The cost associated with fixing bugs after chip “tape out” is substantial and can cost millions of dollars. To de-risk schedules, testing needs to happen early and often—pre-silicon.

IXIA SOLUTIONS

Ixia’s IxVerify™ is the industry’s only test solution purpose-built for “pre-silicon” validation. With this solution, Ixia and its partners are leading the way in transforming the electronic document access (EDA) market by offering virtualized test solutions that work in conjunction with the leading EDA systems, including Mentor Graphics, Synopsys, and Cadence Design Systems, to leverage virtualization to reduce costs and offer increased flexibility.


IxVerify extends Ixia’s intellectual property and test expertise into the EDA space. It enables new and improved test methodologies to simplify pre-silicon testing and shifts testing further into the development cycle.


IxVerify provides hundreds of predefined packet templates for testing Ethernet and transport control protocol (TCP)/IP protocols and is capable of generating high volumes of traffic. With its ability to run hundreds of virtualized test ports at once, it offers the unique ability to dynamically shape traffic to ensure zero packet loss at maximum emulation speeds.


IxVerify is the perfect solution for de-risking complex networking chip design and development and ensures faster time to market for the next generation of networking devices.

CONTACT US